Second try at USSR integrated circuit analysis

In the previous post, I logicked my way into the geometry of a transistor. But in fact, the geometry turned out to be wrong since none of the circuitry made any sense. So I decided to start from this diagram, which is similar to the 74141 diagram. Which makes sense since the К155ИД1 is the same as the 74141.

From the 74141 datasheet.

From the 74141 datasheet.

So if I look at the A input, I should see an inverter and a second inverter. The outputs from these go to output transistors.

Next, I drew one of the transistors in the above circuits as a generic three-terminal device: 0 for a terminal with no region around it, 1 for one region, and 2 for two regions.

Then, I drew the inverter circuits based on what I saw on the chip.

Then I logicked my way to a reasonable schematic. The two-terminal question-marked component seems to be maybe a resistor. 0 seems to be the base, 1 is the emitter, and 2 is the collector.

OK, this makes some sense. The two transistors on the left are an inverter. X taps off the output of the inverter, and the third transistor on the right is what you'd typically see in a 7400-series input. It's just two diodes back to back in a current-steering circuit. Since it taps off the emitter of the output, it is the inverse of X.

That means that we have this interpretation of a transistor:

Now, let's take a look at the outputs.

OK, that's not right according to the datasheet. But on the other hand, it could work. If A is high, and if DCB = 100, then we want 9 to sink current and 8 to be off. If A is high then X is low, which means that as long as the base is active, 9 will sink current.

I still haven't identified the protective zener diodes on the outputs.

So if the terminal designations are correct, then it's possible that this is the doping schema.


So what I've been calling the "hillock" in the middle of the rectangular region is perhaps the p-doped base. Again, this is weird compared to what you usually see, which is the collector completely surrounding the base.

The collector probably has an n+ region, which improves connectivity. It is embedded in an n or n- region forming the collector.

Note that I think the base contact seems to overlap into the rectangular region. If the rectangular region is n-doped and somehow connects to the collector, which is perhaps an n- region, then this may form a Schottky diode, meaning that these transistors are Schottky transistors.

So technically the collector does surround the base, it's just that it does it through a differently doped region.

Again, I don't have enough knowledge of IC fabrication to know whether this would work. But it seems... logicky?

Special snowflake transistors from the USSR

When I sat down to reverse engineer every Nixie enthusiast's favorite Soviet chip, the К155ИД1 BCD-to-decimal decoder/driver (K155ID1 when you're at home), I had no idea that I would have to spend a day staring at it and trying to make sense of it.

Here is an NPN transistor on the chip:

Here it is with the contacts:

And here is the type of transistor I'm more familiar with, on a different chip:

The above image matches pretty much every diagram you see on the web of an NPN transistor. It's basically concentric: the outer region is the collector, the inner region is the base, and the region(s) inside that are emitters. The above transistor has two emitters. Here, let me annotate that:

Red is the collector region, blue is the base region, and green is the emitter region. The contact that touches the base region also touches the collector region, but through a bit of metal. That structure forms a Schottky diode which is connected from base to collector, but that's not the important point.

The key here is that the regions are concentric, which makes the terminals very easy to identify.

But we don't seem to have that in the К155ИД1.

After staring at the image, and doodling various attempts at cross-sections, I finally came up with this explanation. Let me put the original image in here again, marked up with what I think is going on, and follow it up with the cross-section I settled on.

NOTE: All of the following discussion about transistors turns out to be wrong. This was my first analysis.

Unlike in other chips, the n+ buried layer is very prominent, raising a distinct hillock-looking region. Another major difference, looking at my drawing above, is that where normally the p-doped base surrounds the n-doped emitter, here the base appears to be separated from the emitter on the surface, although I think under the surface the base does surround the emitter. So on the surface, it only looks like the base and emitter are separate.

The whole rectangular area is n-doped, and surrounded by p+ isolation. This isolation is grounded.

Another source of my puzzlement was that the emitter and base overlap the hillock. But I guess that as long as they are all within the n-doped collector region, it doesn't really matter.

I'm not enough of an IC fabrication person to say for certain whether this is correct. But it seems to explain all the visual characteristics.

Update: All this turned out to be wrong, as I discovered when I tried to trace out the circuitry. None of it made sense. The next post discusses another analysis.

The next unexpected thing is how resistors are formed. Here's what I'm used to, from a 74LS01 chip:

Resistors are formed of polysilicate or highly n-doped "wires". The longer and thinner, the more resistance. So here's what greeted me for the many resistors that are supposed to connect transistors to VCC:

The black squares are contacts. Where are the resistors? Here is the image with the metal layer:

The wires that terminate in contacts in this VCC-connected region are clearly meant to go to resistors to VCC. So my thought is that the whole thing is just one big planar sheet resistor. The designers perhaps had a good model of what resistance would be formed to VCC at any point in the area.

This VCC-connected area seems to be surrounded by p+ isolation, is probably n-doped, and seems to have a large n+ buried layer underneath. The disturbing thing is that the wires terminate closer to each other than to VCC terminals, implying that they are connected by smaller resistances to each other than to VCC. Presumably that doesn't seem to matter, since the IC clearly works just fine like that.

Anyway, this just confirms my idea that each group of chips is its own special snowflake.


Chip Decapping Adventure #5: Removing the top metal layer

Having successfully removed the top glass layer of the die with [Armour Etch], which [Amazon] says is NOT RECOMMENDED FOR CLEANING GLASSES! I proceeded to remove the top metal layer. First, a shot of the die with the glass still intact:

Following a recipe I found in the slides of Lecture 6 [PDF] from RPI's [Hardware Reverse Engineering] course for removing copper metal, I put the chip in a teflon beaker (it was small, so I used it) and added 6 mL of 3% hydrogen peroxide and 1 mL of 32% hydrochloric acid [DudaDiesel]. I could see bubbling coming mainly from the leftover metal of the leadframe, so I figured the solution was working. I left it for 5 minutes, then removed the chip, sprayed with diluted water, and sprayed with acetone to dry.

The result:

Success! You can see that the top metal layer is gone, leaving the glass underneath it. The bottom metal layer was not touched. Maybe because it is aluminum?

Here's an interesting feature, showing where a via from top metal to bottom metal was removed, and there is some glass around where it was:

And here is something I noticed while I was taking images after I thought the chip was dry:

That is probably acetone that leaked under the glass and is slowly being pulled out by drying in atmosphere.

Here is something that I'm struggling to make sense of:

On the right is the die before the top glass and top metal was removed. On the left is the die after. We can see that in two cases, the inner rectangles have expanded, and in one case it looks like an over-etch of glass. In the expanded cases, maybe this is just an optical effect from the glass.

Anyway, the chip is quite dirty. I did not clean it in an ultrasonic bath. Also, I think to get a better picture, I should try another round of Armour Etch to get rid of the remaining glass so that the whole image is clear. Hopefully this will not damage the bottom doped layer.